/*
 * FB driver for the ST7789 LCD Controller
 *
 * Copyright (C) 2015 Dennis Menschel
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <video/mipi_display.h>
#include <linux/gpio.h>
#include "fbtft.h"

#define DRVNAME "fb_st7789"

#define DEFAULT_GAMMA \
	"70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25\n" \
	"70 2C 2E 15 10 09 48 33 53 0B 19 18 20 25"

#define HSD20_IPS_GAMMA \
	"D0 17 19 04 03 04 32 41 43 09 14 12 33 2C\n" \
	"D0 18 17 04 03 04 31 46 43 09 14 13 31 2D"

#define HSD20_IPS 1

#ifndef CONFIG_FB_TFT_SILENT_INIT
#define __RESET__	1
#endif
//#define __BKLEN__	1

#define __TEST_INIT_0C	1
/**
 * enum st7789_command - ST7789 display controller commands
 *
 * @PORCTRL: porch setting
 * @GCTRL: gate control
 * @VCOMS: VCOM setting
 * @VDVVRHEN: VDV and VRH command enable
 * @VRHS: VRH set
 * @VDVS: VDV set
 * @VCMOFSET: VCOM offset set
 * @PWCTRL1: power control 1
 * @PVGAMCTRL: positive voltage gamma control
 * @NVGAMCTRL: negative voltage gamma control
 *
 * The command names are the same as those found in the datasheet to ease
 * looking up their semantics and usage.
 *
 * Note that the ST7789 display controller offers quite a few more commands
 * which have been omitted from this list as they are not used at the moment.
 * Furthermore, commands that are compliant with the MIPI DCS have been left
 * out as well to avoid duplicate entries.
 */
enum st7789_command {
	PORCTRL = 0xB2,
	GCTRL = 0xB7,
	VCOMS = 0xBB,
	VDVVRHEN = 0xC2,
	VRHS = 0xC3,
	VDVS = 0xC4,
	VCMOFSET = 0xC5,
	PWCTRL1 = 0xD0,
	PVGAMCTRL = 0xE0,
	NVGAMCTRL = 0xE1,
};

#define MADCTL_BGR BIT(3) /* bitmask for RGB/BGR order */
#define MADCTL_MV BIT(5) /* bitmask for page/column order */
#define MADCTL_MX BIT(6) /* bitmask for column address order */
#define MADCTL_MY BIT(7) /* bitmask for page address order */

/**
 * init_display() - initialize the display controller
 *
 * @par: FBTFT parameter object
 *
 * Most of the commands in this init function set their parameters to the
 * same default values which are already in place after the display has been
 * powered up. (The main exception to this rule is the pixel format which
 * would default to 18 instead of 16 bit per pixel.)
 * Nonetheless, this sequence can be used as a template for concrete
 * displays which usually need some adjustments.
 *
 * Return: 0 on success, < 0 if error occurred.
 */
static int init_display(struct fbtft_par *par)
{
#ifndef CONFIG_FB_TFT_SILENT_INIT
	//par->fbtftops.reset(par);
	//printk("%s 1\n",__func__);
	gpio_set_value(par->gpio.reset, 0);
	__MDELAY(20);
	gpio_set_value(par->gpio.reset, 1);
	//printk("%s 2\n",__func__);
	__MDELAY(120);

	write_reg(par, 0x36, 0x00);
	write_reg(par, 0x3A, 0x05);

	write_reg(par, 0xB2, 0x0C, 0x0C, 0x00, 0x33, 0x33);

	write_reg(par, 0xB7, 0x35);
	write_reg(par, 0xBB, 0x19);

	write_reg(par, 0xC0, 0x2C);
	write_reg(par, 0xC2, 0x01, 0xFF);
	write_reg(par, 0xC3, 0x12);
	write_reg(par, 0xC4, 0x20);
	//write_reg(par, 0xC5, 0x1F);
	write_reg(par, 0xC6, 0x0F);
	write_reg(par, 0xD0, 0xA4, 0xA1);

	write_reg(par, 0xE0, 0xD0, 0x04, 0x0D, 0x11, 0x13, 0x2B, 0x3F, 0x54, 0x4C, 0x18, 0x0D, 0x0B, 0x1F, 0x23);
	write_reg(par, 0xE1, 0xD0, 0x04, 0x0C, 0x11, 0x13, 0x2C, 0x3F, 0x44, 0x51, 0x2F, 0x1F, 0x1F, 0x20, 0x23);

  	write_reg(par, 0x21);		//? INVON (21h): Display Inversion On, INVOFF (20h): Display Inversion Off
	write_reg(par, 0x11);
	__MDELAY(120);
	write_reg(par, 0x29);		// DISPON (29h): Display On

	{
			/* set windows 0 */
		unsigned short xEnd = 239;
		unsigned short yEnd = 319;
		write_reg(par, 0x36, 0x00);	//BGR==1,MY==0,MX==0,MV==0
		write_reg(par, 0x2A, 0x0, 0x0, ((xEnd >> 8) & 0xff), (xEnd & 0xff));
		write_reg(par, 0x2B, 0x0, 0x0, ((yEnd >> 8) & 0xff), (yEnd & 0xff));
		//write_reg(par, 0x2C);
	}

#endif /* CONFIG_FB_TFT_SILENT_INIT */

	return 0;
}

void __fb_st7789v_test(struct fbtft_par *par, unsigned short color) {
	int __w = 240, __h = 320;
	int i, m;
	write_reg(par, 0x2C);
	for(i=0; i<__w; i++) {
		for(m=0; m<__h; m++) {
			//__MDELAY(120);
			//write_dat(par, (color>>8) & 0xff);
			write_dat(par, ((color>>8) & 0xff));
			//__MDELAY(120);
			//write_dat(par, (color>>0) & 0xff);
			write_dat(par, ((color>>0) & 0xff));
		}
	}
}

void __fb_rotate_test(struct fbtft_par *par, unsigned short *color) {
	extern unsigned char SpiLcm320x240_map[];
	int i=0; unsigned short _color = 0;
	unsigned short *_p16buf = (unsigned short *)&SpiLcm320x240_map;

	write_reg(par, 0x2C);
	for(i=0; i<(240*320); i++) {
		_color = _p16buf[i];
		write_dat(par, ((_color>>8) & 0xff));
		write_dat(par, ((_color>>0) & 0xff));
	}
}

void __fb_rotate_te0t(struct fbtft_par *par, unsigned short *color) {
	extern unsigned char SpiLcm320x240_0_map[];
	int i=0; unsigned short _color = 0;
	unsigned short *_p16buf = (unsigned short *)&SpiLcm320x240_0_map;

	write_reg(par, 0x2C);
	for(i=0; i<(240*320); i++) {
		_color = _p16buf[i];
		write_dat(par, ((_color>>8) & 0xff));
		write_dat(par, ((_color>>0) & 0xff));
	}
}
/**
 * set_var() - apply LCD properties like rotation and BGR mode
 *
 * @par: FBTFT parameter object
 *
 * Return: 0 on success, < 0 if error occurred.
 */
static int set_var(struct fbtft_par *par)
{
#if 0
	u8 madctl_par = 0;

	if (par->bgr)
		madctl_par |= MADCTL_BGR;
	switch (par->info->var.rotate) {
	case 0:
		break;
	case 90:
		madctl_par |= (MADCTL_MV | MADCTL_MY);
		break;
	case 180:
		madctl_par |= (MADCTL_MX | MADCTL_MY);
		break;
	case 270:
		madctl_par |= (MADCTL_MV | MADCTL_MX);
		break;
	default:
		return -EINVAL;
	}
	write_reg(par, MIPI_DCS_SET_ADDRESS_MODE, madctl_par);
#endif
	//printk("%s \n",__func__);
	return 0;
}

/**
 * set_gamma() - set gamma curves
 *
 * @par: FBTFT parameter object
 * @curves: gamma curves
 *
 * Before the gamma curves are applied, they are preprocessed with a bitmask
 * to ensure syntactically correct input for the display controller.
 * This implies that the curves input parameter might be changed by this
 * function and that illegal gamma values are auto-corrected and not
 * reported as errors.
 *
 * Return: 0 on success, < 0 if error occurred.
 */
static int set_gamma(struct fbtft_par *par, unsigned long *curves)
{
#if 0
	int i;
	int j;
	int c; /* curve index offset */

	/*
	 * Bitmasks for gamma curve command parameters.
	 * The masks are the same for both positive and negative voltage
	 * gamma curves.
	 */
	static const u8 gamma_par_mask[] = {
		0xFF, /* V63[3:0], V0[3:0]*/
		0x3F, /* V1[5:0] */
		0x3F, /* V2[5:0] */
		0x1F, /* V4[4:0] */
		0x1F, /* V6[4:0] */
		0x3F, /* J0[1:0], V13[3:0] */
		0x7F, /* V20[6:0] */
		0x77, /* V36[2:0], V27[2:0] */
		0x7F, /* V43[6:0] */
		0x3F, /* J1[1:0], V50[3:0] */
		0x1F, /* V57[4:0] */
		0x1F, /* V59[4:0] */
		0x3F, /* V61[5:0] */
		0x3F, /* V62[5:0] */
	};

	for (i = 0; i < par->gamma.num_curves; i++) {
		c = i * par->gamma.num_values;
		for (j = 0; j < par->gamma.num_values; j++)
			curves[c + j] &= gamma_par_mask[j];
		write_reg(par, PVGAMCTRL + i,
			  curves[c + 0],  curves[c + 1],  curves[c + 2],
			  curves[c + 3],  curves[c + 4],  curves[c + 5],
			  curves[c + 6],  curves[c + 7],  curves[c + 8],
			  curves[c + 9],  curves[c + 10], curves[c + 11],
			  curves[c + 12], curves[c + 13]);
	}
#endif
	//printk("%s \n",__func__);
	return 0;
}

/**
 * blank() - blank the display
 *
 * @par: FBTFT parameter object
 * @on: whether to enable or disable blanking the display
 *
 * Return: 0 on success, < 0 if error occurred.
 */
static int blank(struct fbtft_par *par, bool on)
{
	if (on)
		write_reg(par, MIPI_DCS_SET_DISPLAY_OFF);
	else
		write_reg(par, MIPI_DCS_SET_DISPLAY_ON);
	return 0;
}

#include <linux/io.h>
#include <linux/gpio.h>
#include <linux/kernel.h>

#define REG_TOP_PIN_BASE    0x10200000

#define REG_SPI_CSN_PIN     (0x064)
#define REG_SPI_CLK_PIN     (0x05C)
#define REG_SPI_SDO_PIN     (0x058)
#define REG_SPI_SDA_PIN     (0x060)
#define REG_GPIO3_1_PIN     (0x054)
#define REG_GPIO3_5_PIN     (0x050)
#define REG_GPIO5_0_PIN		(0x028)

#define REG_LCD_RSX_PIN		REG_GPIO3_1_PIN
#define REG_LCD_RST_PIN		REG_GPIO3_5_PIN
#define REG_LCD_BKL_PIN		REG_GPIO5_0_PIN

#define MC_GPIO3_1	(3*8+1)	//used for LCD_RSX
#define MC_GPIO3_5	(3*8+5)	//used for LCD_RST
#define MC_GPIO5_0	(5*8+0)	//used for LCD_BKL


void __test_baudrate(void)
{
	void __iomem * _vbase = ioremap(0x08b00000, 0x100);
	unsigned int val = readl((u32)_vbase + 0x14);
	printk("%s 0x08b00014:%d\n",__func__, val);
	iounmap(_vbase);
}

static void __pin_init(void)
{
	//printk("%s e\n",__func__);
	void __iomem * _vbase = ioremap(REG_TOP_PIN_BASE, 0x100);
	if (!_vbase) return -ENOMEM;
	//printk("%s %p\n",__func__, _vbase);
	volatile unsigned int *reg = (volatile unsigned int *)_vbase;
	//printk("%s %p\n",__func__, reg);
    writel(2, (u32)reg + REG_SPI_CSN_PIN);
    writel(2, (u32)reg + REG_SPI_CLK_PIN);
    writel(2, (u32)reg + REG_SPI_SDA_PIN);
	writel(2, (u32)reg + REG_SPI_SDO_PIN);
    writel(1, (u32)reg + REG_LCD_RSX_PIN);
#ifdef __RESET__
	writel(1, (u32)reg + REG_LCD_RST_PIN);
#endif
#ifdef __BKLEN__
	writel(1, (u32)reg + REG_LCD_BKL_PIN);
#endif
	iounmap(_vbase);

	_vbase = ioremap(0x09200200, 0x100);
	reg = (volatile unsigned int *)_vbase;
	/* 100MHz */
	unsigned int val = readl((u32)reg + 0x50);
	if(val != 2) {
		printk("%s 0x09200250:0x%x\n", __func__, val);
		//writel(2, (u32)reg + 0x50);
	}
	val = readl((u32)reg + 0x6c);
	if(val != 0x102) {
		printk("%s 0x0920026c:0x%x\n", __func__, val);
		//writel(0x102, (u32)reg + 0x6c);
	}
	iounmap(_vbase);
	_vbase = ioremap(0x08b00000, 0x100);
	//printk("%s 0x08b00000:%p\n",__func__, _vbase);
	iounmap(_vbase);

	//printk("%s x\n",__func__);
}

static int request_gpios(struct fbtft_par *par)
{
	//printk("%s e\n",__func__);
	par->gpio.dc = MC_GPIO3_1;
#ifdef __RESET__
	par->gpio.reset = MC_GPIO3_5;
#endif

#ifdef __BKLEN__
	int gpio_bkl = MC_GPIO5_0;
#endif

	__pin_init();
	if(gpio_request(par->gpio.dc, "dc-gpio"))
		printk("spi tft failed to request the gpio:%d\n", par->gpio.dc);
	gpio_direction_output(par->gpio.dc, 0);

#ifdef __BKLEN__
	if(gpio_request(gpio_bkl, "bkl-gpio"))
		printk("spi tft failed to request the gpio:%d\n", gpio_bkl);
	gpio_direction_output(gpio_bkl, 1);
#endif

#ifdef __RESET__
	if(gpio_request(par->gpio.reset, "reset-gpio"))
		printk("spi tft failed to request the gpio:%d\n", par->gpio.reset);
	gpio_direction_output(par->gpio.reset, 0);
#endif

	//printk("%s x\n",__func__);
	return 0;
}

static struct fbtft_display display = {
	.buswidth = 8,
	.bpp = 0,
	.fps = 30,
	.txbuflen = 0,
	.debug = 0,
	.regwidth = 8,
	.width = 240,
	.height = 320,
	.gamma_num = 2,
	.gamma_len = 14,
	.gamma = HSD20_IPS_GAMMA,
	.fbtftops = {
		.init_display = init_display,
		.set_var = set_var,
		.set_gamma = set_gamma,
		.blank = blank,
		.request_gpios = request_gpios,
	},
};

#if 0
static struct fbtft_platform_data platfrom_data = {
	.rotate = 0,
	.bgr = 0,
	.fps = 30,
	.txbuflen = 0,
	.startbyte = 0,
};

struct fbtft_platform_data * fbtft_driver_get_platform_data(const char* name) {
	memcpy(&platfrom_data.display, &display, sizeof(struct fbtft_display));
	return &platfrom_data;
}
EXPORT_SYMBOL(fbtft_driver_get_platform_data);

static int __init fbtft_test_gpio(void)
{
	__pin_init();
	gpio_request(MC_GPIO2_6, "dc-gpio");
	gpio_direction_output(MC_GPIO2_6, 0);
	gpio_set_value(MC_GPIO2_6, 0);
	__MDELAY(120);
	gpio_set_value(MC_GPIO2_6, 1);
	__MDELAY(120);
	gpio_set_value(MC_GPIO2_6, 1);
}

module_init(fbtft_test_gpio);
#endif

FBTFT_REGISTER_DRIVER(DRVNAME, "sitronix,st7789", &display);

MODULE_ALIAS("spi:" DRVNAME);
MODULE_ALIAS("platform:" DRVNAME);
MODULE_ALIAS("spi:st7789");
MODULE_ALIAS("platform:st7789");

MODULE_DESCRIPTION("FB driver for the ST7789 LCD Controller");
MODULE_AUTHOR("Dennis Menschel");
MODULE_LICENSE("GPL");
